Si nanodevices for random number generating circuits for cryptographic security

Author

Fujita, S. ; Uchida, Kazunori ; Yasuda, Shuhei ; Ohba, R. ; Nozaki, H. ; Tanamoto, Tetsufumi

Author_Institution

Toshiba, Kawasaki, Japan

fYear

2004

fDate

15-19 Feb. 2004

Firstpage

294

Abstract

Small random-number-generating circuits for cryptographic security using Si nano-devices are described. The basis of these circuits is that nano-devices hold random electrical properties naturally that were previously regarded as a negative feature. Results of statistical tests indicate that these circuits generate extremely high-quality random numbers with relatively few transistors.

Keywords

MOSFET; cryptography; elemental semiconductors; multivibrators; nanoelectronics; percolation; random number generation; silicon; single electron transistors; MOS gate; Si; astable multivibrator; cryptographic security; high generation rate; high-quality random numbers; percolation channels; percolation leakage paths; random number generating circuits; silicon nanodevices; single-electron transistor; single-electron trap; small security devices; soft breakdown; statistical tests; Breakdown voltage; Circuit testing; Counting circuits; Cryptography; Electron traps; Fluctuations; Frequency; Random number generation; Security; Stochastic processes;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International

ISSN

0193-6530

Print_ISBN

0-7803-8267-6

Type

conf

DOI

10.1109/ISSCC.2004.1332710

Filename

1332710