DocumentCode
341362
Title
Correlation learning rule in floating-gate pFET synapses
Author
Hasler, Paul ; Dugger, Jeff
Author_Institution
Georgia Inst. of Technol., Atlanta, GA, USA
Volume
5
fYear
1999
fDate
1999
Firstpage
387
Abstract
We study the weight dynamics of the floating-gate pFET synapse and the effects of the pFET´s gate and drain voltages on these dynamics. We show that we can derive a weight update rule such that the equilibrium weight value is proportional to the correlation between the gate and drain voltages. In particular, we want a rule of the form τ´Δw˙=-Δw+ηE[xy], where x is the signal on the gate terminal and y is the signal on the drain terminal. We obtain this rule by making a linear approximation to the weight dynamics around a given equilibrium point. We develop this approximation by considering the basic functional form of the system dynamics and then examining the effects of the gate and drain voltages on the specifics of this form
Keywords
MOS analogue integrated circuits; analogue processing circuits; hot carriers; insulated gate field effect transistors; learning (artificial intelligence); neural chips; tunnelling; correlation learning rule; drain voltage; electron tunnelling; equilibrium weight value; floating-gate pFET synapses; gate voltage; hot electron injection currents; linear approximation; weight dynamics; weight update rule; Analog computers; Circuits; Computer networks; Feedback; Linear approximation; Neural networks; Nonvolatile memory; Secondary generated hot electron injection; Tunneling; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location
Orlando, FL
Print_ISBN
0-7803-5471-0
Type
conf
DOI
10.1109/ISCAS.1999.777590
Filename
777590
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