Title :
Designing PCI bus interfaces with programmable logic
Author :
Fawcett, Bradly K.
Author_Institution :
Xilinx Inc., San Jose, CA, USA
Abstract :
PCI-compliant high-density programmable logic devices can be used to create flexible PCI bus interfaces while avoiding the costs and risks of custom IC development. However, careful design is required to meet the performance and signaling requirements of the PCI specification. This paper focuses on the attributes needed in programmable logic devices to facilitate interface design, and suggests appropriate design techniques
Keywords :
field programmable gate arrays; logic design; peripheral interfaces; programmable logic devices; system buses; EPLD; FPGA; PCI bus interface design; flexible PCI bus interfaces; parity checking; parity generation; peripheral component interconnect; programmable logic devices; signaling requirements; state machines; Clocks; Costs; Delay; Field programmable gate arrays; Logic design; Logic devices; Logic testing; Programmable logic arrays; Programmable logic devices; Timing;
Conference_Titel :
ASIC Conference and Exhibit, 1995., Proceedings of the Eighth Annual IEEE International
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-2707-1
DOI :
10.1109/ASIC.1995.580740
