Title :
VHDL and silicon compiler experience in the advanced processor interface unit ASIC design
Author :
Chang, K.C. ; Le, Hugh ; Ling, Calvin ; Lin, Don
Author_Institution :
Boeing Def. & Space Group, Seattle, WA, USA
Abstract :
This paper summarizes the process of designing an advanced processor interface unit (APIU) ASIC using VHDL simulation, synthesis, and silicon compilation. Problems and areas for improvements in the interface between different CAD tool environments are addressed. VHDL entity and hierarchy partition guidelines are discussed with examples
Keywords :
application specific integrated circuits; circuit CAD; circuit analysis computing; circuit layout CAD; computer interfaces; hardware description languages; integrated circuit design; microprocessor chips; APIU; ASIC design; CAD; VHDL simulation; advanced processor interface unit; entity partition; hierarchy partition; silicon compiler; synthesis; Aerospace electronics; Application specific integrated circuits; Counting circuits; Design automation; Guidelines; Read only memory; Read-write memory; Silicon compiler; Testing; Variable structure systems;
Conference_Titel :
ASIC Conference and Exhibit, 1995., Proceedings of the Eighth Annual IEEE International
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-2707-1
DOI :
10.1109/ASIC.1995.580742
