Title : 
Feasible offset and optimal offset for single-layer channel routing
         
        
            Author : 
Greenberg, Ronald I. ; Shih, Jau-Der
         
        
            Author_Institution : 
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
         
        
        
        
        
        
            Abstract : 
The paper provides an efficient method to find all feasible offsets for a given separation in a VLSI channel routing problem in one layer. The prior literature considers this task only for problems with no single-sided nets. When single-sided nets are included, the worst-case solution time increases from Θ(n) to Ω( n2), where n is the number of nets. But, if the number of columns c is O(n), one can solve the problem in time O(n1.5lg n ), which improves upon a `naive´ O(cn) approach. As a corollary of this result, the same time bound suffices to find the optimal offset (the one that minimizes separation). Better running times are obtained when there are no two-sided nets or all single-sided nets are on one side to the channel. The authors also give improvements upon the naive approach for c≠O(n), including an algorithm with running time independent of c
         
        
            Keywords : 
VLSI; circuit layout; computational complexity; minimisation of switching nets; VLSI channel routing problem; feasible offsets; optimal offset; running times; single-layer channel routing; time bound; worst-case solution time; Educational institutions; Nonhomogeneous media; Rivers; Routing; Very large scale integration; Wire;
         
        
        
        
            Conference_Titel : 
Theory and Computing Systems, 1993., Proceedings of the 2nd Israel Symposium on the
         
        
            Conference_Location : 
Natanya
         
        
            Print_ISBN : 
0-8186-3630-0
         
        
        
            DOI : 
10.1109/ISTCS.1993.253470