Title :
A 4.6GHz resonant global clock distribution network
Author :
Chan, S.C. ; Restle, P.J. ; Shepard, Kenneth L. ; James, N.K. ; Franch, R.L.
Author_Institution :
Columbia Univ., New York, NY, USA
Abstract :
A resonant global clock-distribution network operating at 4.6GHz is designed in a 90nm 1.0V CMOS technology. Unique to this approach is the set of on-chip spiral inductors that resonate with the clock capacitance, resulting in 20% recycling of global clock power.
Keywords :
CMOS digital integrated circuits; clocks; inductors; timing jitter; 1.0 V; 4.6 GHz; CMOS technology; clock capacitance; clock edge uncertainty; global clock power recycling; jitter reduction; lumped circuit model; on-chip spiral inductors; resonant global clock distribution network; sector clock buffer; Capacitance; Circuit testing; Clocks; Frequency; Hardware; Inductors; Jitter; Resonance; Semiconductor device measurement; Spirals;
Conference_Titel :
Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
Print_ISBN :
0-7803-8267-6
DOI :
10.1109/ISSCC.2004.1332734
