• DocumentCode
    3414099
  • Title

    PowerTune: advanced frequency and power scaling on 64b PowerPC microprocessor

  • Author

    Lichtenau, C. ; Pfluger, T. ; Geissler, S. ; Hilgendorf, R. ; Heaslip, J. ; Weiss, U. ; Sandon, P. ; Rohrer, N. ; Cohen, Emmanuel ; Canada, M.

  • Author_Institution
    IBM, Boeblingen, Germany
  • fYear
    2004
  • fDate
    15-19 Feb. 2004
  • Firstpage
    356
  • Abstract
    PowerTune is a power-management technique for a multi-gigahertz superscalar 64b PowerPC® processor in a 90nm technology. This paper discusses the challenges and implementation of a dynamically controlled clock frequency with noise suppression as well as a synchronization circuit for a multi-processor system.
  • Keywords
    clocks; digital phase locked loops; microprocessor chips; synchronisation; PowerPC microprocessor; PowerTune; divided clocks; dynamically controlled clock frequency; frequency scaling; multi-gigahertz superscalar processor; multiprocessor system; noise suppression; power scaling; power-management technique; single PLL driving divider circuitry; synchronization circuit; Clocks; Counting circuits; Delay; Energy management; Frequency conversion; Logic; Microprocessors; Phase locked loops; Switches; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-8267-6
  • Type

    conf

  • DOI
    10.1109/ISSCC.2004.1332741
  • Filename
    1332741