Multi-objective design strategy for high-level low power design of DSP systems

High-level power design presents a complex, multi-objective problem that involves the simultaneous optimisation of competing criteria such as speed, area and power. It is difficult to combine these objectives into a single cost function, as this effectively requires prioritisation of the parameters, which may reduce the overall quality of the solution. A superior approach is to simultaneously optimise all variables, removing the bias towards any particular objective. This paper presents a methodology for effective optimisation of VLSI based DSP designs in a multi-objective CAD framework. The CAD tool uses a stochastic search technique, based on a genetic algorithm, to determine power optimal designs with minimum area implementation. Pareto-optimal surfaces are used to illustrate the trade-offs between the competing parameters, enabling a VLSI designer to select the solution that best meets the implementation requirements. Results are presented, for the power exploration of high-level DSP algorithms, to illustrate the benefits of presenting trade-off information in low power design