Title :
Configuration self-test in FPGA-based reconfigurable systems
Author :
Quddus, Wasim ; Jas, Abhijit ; Touba, Nur A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Abstract :
An FPGA-based reconfigurable system may contain boards of FPGAs which are reconfigured for different applications and must work correctly. This paper presents a novel approach for rapidly testing the configuration in the FPGAs each time the system is reconfigured. A low-cost configuration-dependent test method is used to detect faults in the circuit. The “original configuration” is modified by only changing the logic function of the CLBs to form “test configurations” that can be used to quickly test the circuit. The test procedure is rapid enough to be performed on the fly whenever the system is reconfigured. The technique is independent of any fault model since it partitions the circuit into segments and tests each segment exhaustively
Keywords :
built-in self test; fault diagnosis; field programmable gate arrays; logic partitioning; logic testing; reconfigurable architectures; FPGA-based reconfigurable systems; circuit partitioning; configuration self-test; fault detection; logic function; test procedure; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Field programmable gate arrays; Logic functions; Logic testing; Performance evaluation; System testing;
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
DOI :
10.1109/ISCAS.1999.777814
