Internal testing of integrated circuits by noncontact sampling electrostatic force microscopy using pulse width modulation technique

With the continuing developments in the fabrication technology of integrated circuits, the task of providing suitable measurement and diagnostic tools becomes more and more difficult. Measurement techniques based on electrostatic force microscopy are proving to be promising solutions. In these techniques, a miniature probe is positioned in a non-contact manner above a test point on a circuit while in operation. The circuit voltage is extracted from the mechanical deflection of the probe cantilever as it responds to an electrostatic force induced by the capacitive coupling between the probe and circuit test point. This paper presents a new sampling electrostatic force microscopy technique that utilizes a pulse width modulation method to sample circuit voltages. The technique has essentially the same capabilities of sampling force microscopy methods but overcomes previously encountered limitations/drawbacks. To demonstrate the technique a scanned measurement of logic states of a CMOS integrated test structure is presented