A process independent ESD design methodology

A methodology has been developed to design ESD protection networks which is independent of the integrated circuit fabrication process employed. The actual devices used to implement the methodology, however are process specific. The basic methodology uses forward biased diodes from each signal input or output lead to divert the ESD current to the supply lines and a clamp to limit the maximum voltage across the supplies. This technique has been successfully applied to processes built on dielectrically isolated, bonded, or junction isolated wafers and has successfully protected bipolar, MOS, and BiCMOS devices used to fabricate analog, digital, mixed signal, and RF circuits