Title :
Modelling and Analysis of Power-Ground Plane for High Speed VLSI System
Author :
Pathak, Abhishek ; Mandal, Sushanta K. ; Nagpal, R.K. ; Malik, Rakesh
Author_Institution :
VLSI Res. Group, DAIICT, Gandhinagar, India
Abstract :
This paper presents RLC equivalent model of power plane for power distribution network (PDN) in high speed VLSI system consisting of package, board, and voltage regulator module. The frequency independent RLC equivalent model can be easily integrated in any SPICE compatible circuit simulator. SPICE simulation results of the proposed RLC models for regular and irregular power-ground plane pair have been extensively verified with full wave EM simulation results. The model shows good matching when compared with EM simulation results. The proposed SPICE model substantially reduces the CPU run time that requires only few seconds for which the EM solver would have taken several hours. Effects of different geometry and material of power plane on self-impedance profile have been analyzed.
Keywords :
RLC circuits; SPICE; VLSI; distribution networks; equivalent circuits; voltage regulators; RLC equivalent model; SPICE compatible circuit simulator; high speed VLSI system; irregular power-ground plane pair; power distribution network; self-impedance profile; voltage regulator; Circuit simulation; Frequency; Packaging; Power system modeling; Power systems; RLC circuits; Regulators; SPICE; Very large scale integration; Voltage;
Conference_Titel :
India Conference (INDICON), 2009 Annual IEEE
Conference_Location :
Gujarat
Print_ISBN :
978-1-4244-4858-6
Electronic_ISBN :
978-1-4244-4859-3
DOI :
10.1109/INDCON.2009.5409416
