Title :
An algorithm for the verification of timing diagrams realizability
Author :
El-Aboudi, Abdelhalim ; Aboulhamid, El-Mostapha
Author_Institution :
Lab. LASSO, Montreal Univ., Que., Canada
Abstract :
In this paper, we present a new method for verifying the realizability of a timing diagram with linear timing constraints, thus ensuring that the implementation of the underlying interface is feasible. The method is based on the consistency of the timing constraints derived from the timing diagram and accepts unknown occurrence times for events produced by the environment
Keywords :
VLSI; circuit CAD; digital integrated circuits; graph theory; hardware-software codesign; integrated circuit design; timing; VLSI design; event graph; linear timing constraints; timing diagrams realizability; verification algorithm; Application software; Communication system software; Computer interfaces; Hardware; Microelectronics; Protocols; Real time systems; Sufficient conditions; Terminology; Timing;
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
DOI :
10.1109/ISCAS.1999.777866
