DocumentCode
341506
Title
An efficient VLSI architecture for RSA public-key cryptosystem
Author
Chiang, Jen-Shim ; Chen, Jim-Kao
Author_Institution
Dept. of Electr. Eng., Tamkang Univ., Tamsui, Taiwan
Volume
1
fYear
1999
fDate
36342
Firstpage
496
Abstract
In this paper, a new efficient VLSI architecture to compute RSA public-key cryptosystem is proposed. The modified H-algorithm is applied to find the modular exponentiation. By this modified H-algorithm, the modular multiplication steps were reduced by about 5n/18. For the modular multiplication the L-algorithm (LSB first) is used. In the architecture of the modular multiplication the iteration times are only half of Montgomery´s algorithm and the H-algorithm. By this arrangement, this architecture of RSA has a very good area-time product
Keywords
VLSI; digital arithmetic; iterative methods; public key cryptography; L-algorithm; RSA public-key cryptosystem; VLSI architecture; area-time product; iteration times; modified H-algorithm; modular exponentiation; modular multiplication steps; Computer architecture; Costs; Credit cards; Decoding; Hardware; Internet; Public key; Public key cryptography; Safety; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location
Orlando, FL
Print_ISBN
0-7803-5471-0
Type
conf
DOI
10.1109/ISCAS.1999.777936
Filename
777936
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