Title :
Bias Temperature Instability: Characterization, modeling and circuit aging evaluation
Author :
Martin-Martinez, J. ; Ayala, N. ; Rodriguez, Roberto ; Nafria, M. ; Aymerich, X.
Author_Institution :
Dept. d´´Eng. Electron., Univ. Autonoma de Barcelona (UAB), Bellaterra, Spain
fDate :
Oct. 29 2012-Nov. 1 2012
Abstract :
In small devices, Bias Temperature Instability (BTI) produces discrete threshold voltage (VT) shifts, which are attributed to the charge and discharge of individual defects. Among others, the Probabilistic Defect Occupancy (PDO) model describes the BTI degradation of the device from these phenomena at atomic level. Since BTI related VT shifts could impact circuit performance, they will have to be accounted for during the design phase. In this work, the PDO model will be reviewed and the parameter extraction described. It will be shown that, when the model is introduced into RELAB, a new reliability simulation tool, the BTI effects in the circuit performance can be evaluated.
Keywords :
field effect transistors; semiconductor device reliability; BTI degradation; BTI effect evaluation; BTI-related VT shifts; FET; PDO model; RELAB; atomic level; bias temperature instability; circuit aging evaluation; defect charge-discharge; design phase; discrete threshold voltage shift; parameter extraction; probabilistic defect occupancy model; Circuit optimization; Degradation; Integrated circuit modeling; Reliability; Stress; Temperature dependence; Transistors;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-4673-2474-8
DOI :
10.1109/ICSICT.2012.6467575