DocumentCode :
3416525
Title :
Ultra-low on-resistance 60-100 V superjunction UMOSFETs fabricated by multiple ion-implantation
Author :
Ninomiya, Hitoshi ; Miura, Yoshinao ; Kobayashi, Kenya
Author_Institution :
Power Manage. Devices Div., NEC Electron. Corp., Kanagawa, Japan
fYear :
2004
fDate :
24-27 May 2004
Firstpage :
177
Lastpage :
180
Abstract :
We propose new low-voltage UMOSFETs with superjunction (SJ) structures to achieve ultra-low on-resistance. The present SJ structure has been formed by multiple boron ion implantations with varied energies up to 2 MeV. This technique enabled us to obtain p-columns with flat sidewalls, which minimize the interference to the drift conduction. The SJ diodes have clearly indicated the breakdown voltage enhancement, as expected, from the SJ characteristics. Drastic on-resistance reduction was demonstrated for the SJ-UMOSFETs with a breakdown voltage of 78 V.
Keywords :
boron; ion implantation; power MOSFET; semiconductor device breakdown; 2 MeV; 60 to 100 V; 78 V; B; breakdown voltage enhancement; drift conduction interference; flat sidewall p-columns; low-voltage UMOSFET; multiple ion-implantation; on-resistance reduction; superjunction UMOSFET; superjunction diodes; superjunction structures; ultra-low on-resistance power MOSFET; Boron; Ion implantation; Power MOSFETs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and ICs, 2004. Proceedings. ISPSD '04. The 16th International Symposium on
Print_ISBN :
4-88686-060-5
Type :
conf
DOI :
10.1109/ISPSD.2004.1332894
Filename :
1332894
Link To Document :
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