DocumentCode :
3416567
Title :
Design of a 200V super junction MOSFET with n-buffer regions and its fabrication by trench filling
Author :
Hattori, Yoshiyuki ; Nakashima, Kyoko ; Kuwahara, Makoto ; Yoshida, Tomoyuki ; Yamauchi, Shoichi ; Yamaguchi, Hitoshi
Author_Institution :
Toyota Central R&D Labs. Inc., Aichi, Japan
fYear :
2004
fDate :
24-27 May 2004
Firstpage :
189
Lastpage :
192
Abstract :
A new super junction trench MOSFET, which has n-buffer regions between trench gates and n columns, was designed and demonstrated. In this structure, the specific on-resistance (RON) does not increase as long as the trench gate bottom is covered with the n buffer, even though the gate position shifts from the designed one. The drift region, consisting of p/n columns in the structure, were formed by a trench filling epitaxial method. The fabricated SJ-MOSFET with a fine cell pitch of 4 μm showed an RON of 2.3 nΩ.cm2 at a breakdown voltage (VBR) of 203 V. The Ron is 35% lower than that of the silicon limit.
Keywords :
isolation technology; power MOSFET; semiconductor device breakdown; 200 V; 203 V; 4 micron; SJ-MOSFET cell pitch; breakdown voltage; n-buffer covered trench gate bottom; n-buffer regions; n-columns; p/n column drift region; specific on-resistance; super junction trench MOSFET; trench filling epitaxial method; trench gates; Isolation technology; Power MOSFETs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and ICs, 2004. Proceedings. ISPSD '04. The 16th International Symposium on
Print_ISBN :
4-88686-060-5
Type :
conf
DOI :
10.1109/ISPSD.2004.1332897
Filename :
1332897
Link To Document :
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