DocumentCode
3416973
Title
Implementation of time-multiplexed CNN building block cell
Author
Lai, K.K. ; Leong, P.H.W.
Author_Institution
Dept. of Electr. Eng., Sydney Univ., NSW, Australia
fYear
1996
fDate
12-14 Feb 1996
Firstpage
80
Lastpage
85
Abstract
We have proposed an area efficient implementation of Cellular Neural Network by using the time-multiplexed method. This paper describes the underlying theory, method, and the circuit architecture of a VLSI implementation. Spice simulation results have been obtained to illustrate the circuit operation. A building block cell of a time-multiplexed cellular neural network has been completed and is currently being fabricated
Keywords
SPICE; VLSI; cellular neural nets; circuit analysis computing; neural chips; time division multiplexing; Spice simulation; VLSI implementation; area efficient implementation; building block cell; circuit architecture; time-multiplexed CNN; Cellular neural networks; Circuits; Design automation; Design engineering; Equations; Image edge detection; Laboratories; Mathematical model; Systems engineering and theory; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics for Neural Networks, 1996., Proceedings of Fifth International Conference on
Conference_Location
Lausanne
ISSN
1086-1947
Print_ISBN
0-8186-7373-7
Type
conf
DOI
10.1109/MNNFS.1996.493775
Filename
493775
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