Cost effective approach to fine pitch BGAs

Ball Grid Array (BGA) technology is becoming the packaging technology of choice. BGA packaging technology offers superior electrical, thermal and size performance compared to other existing package technologies (e.g. QFPs, PLCCs, etc.). However, the biggest challenge affecting BGA technology is the overall cost of the package. At present, cost parity of the BGA to the QFP is above 200 I/O. The design methodology used to date has been cost effective for BGAs at or above 200 I/O but fails to be cost competitive below this pin count. Reducing package size is the single most influential factor in cost reduction. However, BGA size reduction introduces a number of limiting factors that are discussed. The limiting factors to be addressed are the substrate and manufacturing reducing the solderball pitch as well as explore the solderball pitch based upon current substrate design rules, and manufacturing solderball placements capabilities. Specifically, the performance of the finer pitch BGA package and its impact on cost reduction, are described