Title :
A high-speed RSD adaptive filter architecture with a fast carry-free SPT converter
Author :
Chi, Hsiang-Feng
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Abstract :
Adopting a noncanonical structure, redundant signed digit (RSD) arithmetic, and fast radix-4 signed power-of-twos (SPT) conversion, we propose a high-speed LMS adaptive filter architecture with low hardware cost. With this architecture, good performance of adaptive filtering is still maintained
Keywords :
adaptive filters; digital filters; least mean squares methods; redundant number systems; LMS; carry-free SPT converter; hardware cost; high-speed RSD adaptive filter architecture; noncanonical structure; radix-4 signed power-of-twos conversion; redundant signed digit; Adaptive filters; Arithmetic; Computer architecture; Data processing; Delay; Filtering; Finite impulse response filter; Hardware; Least squares approximation; Pipeline processing;
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
DOI :
10.1109/ISCAS.1999.778816
