Fast Macromodel-based Signal Integrity Assessment for RF and Mixed-Signal Modules

This paper presents a macromodel-based approach for fast signal integrity assessment for highly integrated radio frequency (RF) and mixed-signal system on chip (SoC) applications. In particular, we introduce a complexity reduction process that enables the signal integrity verification via analog circuit simulations, and we apply the methodology to complex radio transceiver chips in order to characterize the influence of parasitic elements on the signal processing performance of the system. Some preliminary tests show that the proposed methodology leads to significant simulation speedup factors with respect to standard approaches for the specific application herewith considered.