DocumentCode
3417769
Title
Impacts of antenna layout enhanced charging damage on MOSFET reliability and performance
Author
Yamada, T. ; Eriguchi, K. ; Kosaka, Y. ; Hatada, K.
Author_Institution
Semicond. Res. Center, Matsushita Electr. Ind. Co. Ltd., Osaka, Japan
fYear
1996
fDate
8-11 Dec. 1996
Firstpage
727
Lastpage
730
Abstract
The effects of antenna configuration, the electrically floating antenna and the electrically connected antenna to the substrate during plasma processing, on the charging damage of MOSFETs have been studied. The floating antenna adjacent to the gate antenna increases the degradation of both Q/sub bd/ and V/sub th/. The adjacent diode antenna significantly increases the degradation of Q/sub bd/ without increasing that of V/sub th/. The diode antenna induced damage is enhanced with an increase of electrons injected from the gate antenna to the gate oxide in the bi-directional charging during plasma processing. This phenomenon is explained by a local decrease of the antenna surface charging.
Keywords
MOSFET; semiconductor device reliability; semiconductor process modelling; sputter etching; surface charging; MOSFET performance; MOSFET reliability; Q/sub bd/ degradation; antenna configuration; antenna layout enhanced charging damage; antenna surface charging; bidirectional charging; diode antenna; electrically connected antenna; electrically floating antenna; gate antenna; injected electrons; magnetically enhanced RIE; model; plasma processing; polysilicon antenna patterns; threshold voltage degradation; Degradation; MOSFET circuits; Plasma applications; Plasma density; Plasma devices; Plasma materials processing; Plasma measurements; Semiconductor device reliability; Semiconductor diodes; Surface charging;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1996. IEDM '96., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Print_ISBN
0-7803-3393-4
Type
conf
DOI
10.1109/IEDM.1996.554083
Filename
554083
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