• DocumentCode
    341785
  • Title

    Improving performance of high precision signal processing algorithms on programmable DSPs

  • Author

    Mehendale, Mahesh

  • Volume
    3
  • fYear
    1999
  • fDate
    36342
  • Firstpage
    488
  • Abstract
    In applications, such as high quality audio, that need more than 16 bits of precision, the processing of signals on a 16-bit DSP requires double precision computation and is hence time consuming. Since in residue number system (RNS), the high precision data is decomposed to a lower precision for its processing, in this paper, we propose RNS for increasing the performance of such applications implemented on a single processor. We apply multirate architectures and also suggest some architectural extensions to the processor to further enhance the performance. The results show that performance improvement of more than 57% can be achieved with these implementations. We also show that the power dissipation can be significantly reduced with such implementations
  • Keywords
    computer architecture; digital signal processing chips; residue number systems; architectural extensions; double precision computation; high precision signal processing algorithms; multirate architectures; power dissipation; programmable DSPs; residue number system; Application software; Computer architecture; Digital signal processing; Dynamic range; Finite impulse response filter; Instruments; Power dissipation; Signal processing; Signal processing algorithms; Software performance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
  • Conference_Location
    Orlando, FL
  • Print_ISBN
    0-7803-5471-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1999.778889
  • Filename
    778889