CHARM2: towards an industry-standard wafer surface-charge monitor

Author

Lukaszek, Wes ; Quek, Elgin ; Dixon, William

Author_Institution

Center for Integrated Syst., Stanford Univ., CA, USA

fYear

1992

fDate

30 Sep-1 Oct 1992

Firstpage

148

Lastpage

152

Abstract

The rationale and the content of the CHARM2 test chip, and an experimental program using it to develop an industry-standard wafer surface charging monitor, are discussed. The EEPROM-based monitors are based on the observation that most of the charging damage to IC structures associated with ion- and plasma-based processes is due to the transport and trapping of charges in the oxides of IC device structures. Therefore, to effectively monitor a broad spectrum of charge damage effects, it is sufficient to monitor the magnitudes of the driving forces behind the generation and transport of charges through oxides, namely, the potentials developed across oxides and the magnitudes of process UV emissions

Keywords

charge measurement; integrated circuit testing; plasma deposition; sputter etching; CHARM2 test chip; EEPROM-based monitors; IC structures; charging damage; industry-standard wafer surface-charge monitor; ion-based processes; oxide trapping; plasma-based processes; process UV emissions; EPROM; Electrodes; Electrostatics; Monitoring; Optical devices; Optical saturation; Optical sensors; Surface charging; Testing; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Semiconductor Manufacturing Conference and Workshop, 1992. ASMC 92 Proceedings. IEEE/SEMI 1992

Conference_Location

Cambridge, MA

Print_ISBN

0-7803-0740-2

Type

conf

DOI

10.1109/ASMC.1992.253779

Filename

253779