• DocumentCode
    3417932
  • Title

    PPW Noise Mitigation in Multilayer PCBs by Means of Virtual Island And/or Array of Shorting Vias

  • Author

    Scogna, Ciccomancini A.

  • fYear
    2007
  • fDate
    9-13 July 2007
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    This paper describes the parallel-plate waveguide (PPW) noise mitigation by means of shorting vias and/or Virtual Island. The proposed method is already know in literature, nevertheless important considerations are here addressed: 1) the same noise mitigation level proposed in [S. Nam et. al., IEEE Trans. on Microwave Theory and Technique (2005)] can be achieved by using only shorting vias, 2) the noise mitigation is strictly related to the number of shorting vias, the position and the distance from the signal via, 3) -60 dB noise suppression is obtained when array of shorting vias is used. The mitigation level is investigated both in time domain and frequency domain. Different configurations are studied and the impact of power plane with etched slots due to Virtual Islands on the signal integrity is also analyzed by evaluating TDR and insertion loss of a single-ended microstripline passing from top to bottom layer by means of a through via.
  • Keywords
    microstrip lines; printed circuits; slot lines; PPW noise mitigation; Virtual Island; etched slots; multilayer PCB; multilayer printed circuit boards; parallel-plate waveguide; shorting vias array; single-ended microstripline; Capacitors; Circuit noise; Couplings; Electromagnetic interference; Electromagnetic propagation; Impedance; Noise level; Nonhomogeneous media; Periodic structures; Resonance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electromagnetic Compatibility, 2007. EMC 2007. IEEE International Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    1-4244-1349-4
  • Electronic_ISBN
    1-4244-1350-8
  • Type

    conf

  • DOI
    10.1109/ISEMC.2007.164
  • Filename
    4305744