DocumentCode :
3417970
Title :
Zero-aliasing space compression using a single periodic output and its application to testing of embedded cores
Author :
Bhattacharya, Bhargab B. ; Dmitriev, Alexej ; Goessel, Michael
Author_Institution :
Indian Stat. Inst., Calcutta, India
fYear :
2000
fDate :
2000
Firstpage :
382
Lastpage :
387
Abstract :
A structure-independent method for space compaction based on a new generic scheme is presented in this paper. The compactor compresses test responses of a circuit-under-test (CUT) to a single periodic data stream with guaranteed zero-aliasing, and can be designed only from the knowledge of the test set and the corresponding fault-free responses. An additional response logic and a special code checker are used to design the compactor. The same test set given for the CUT also detects all multiple stuck-at faults in the response logic, and almost all the faults in the rest of the compactor. Further, time compaction is also easily achieved. Since the design does not need any structural information of the CUT, it is useful for testing embedded cores
Keywords :
combinational circuits; comparators (circuits); fault diagnosis; integrated circuit testing; logic testing; multivalued logic circuits; circuit-under-test; code checker; embedded cores; fault-free responses; generic scheme; multiple stuck-at faults; periodic output; response logic; space compaction; structural information; structure-independent method; test responses; time compaction; zero-aliasing space compression; Circuit faults; Circuit testing; Combinational circuits; Compaction; Fault detection; Informatics; Logic design; Logic testing; System testing; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2000. Thirteenth International Conference on
Conference_Location :
Calcutta
ISSN :
1063-9667
Print_ISBN :
0-7695-0487-6
Type :
conf
DOI :
10.1109/ICVD.2000.812637
Filename :
812637
Link To Document :
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