DocumentCode
3418276
Title
A 3.3 V compatible 2.5 V TTL-to-CMOS bidirectional I/O buffer
Author
Maheshwari, Sanjeev Kumar ; Visweswaran, G.S.
Author_Institution
Dept. of Electr. Eng., Indian Inst. of Technol., Delhi, India
fYear
2000
fDate
2000
Firstpage
484
Lastpage
487
Abstract
Design of a 3.3 V compatible 2.5 V TTL-to-CMOS bidirectional I/O buffer is proposed. Gate oxide protection was implemented without active voltage degradation, which reduces static and dynamic current levels and improves noise immunity for the low voltage circuit of this kind. Fast removal of stored charge further improves gate oxide protection and circuit recovery from overvoltage condition. A circuit was designed and simulated in 0.25 μm technology
Keywords
VLSI; buffer circuits; integrated circuit design; integrated circuit noise; low-power electronics; mixed analogue-digital integrated circuits; overvoltage protection; 0.25 micron; 2.5 V; 3.3 V; TTL-to-CMOS bidirectional I/O buffer; VLSI; active voltage degradation; circuit recovery; dynamic current levels; gate oxide protection; low voltage circuit; noise immunity; overvoltage condition; static current levels; Atherosclerosis; Circuit simulation; Degradation; Energy consumption; Low voltage; MOSFETs; Protection; System buses; Threshold voltage; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2000. Thirteenth International Conference on
Conference_Location
Calcutta
ISSN
1063-9667
Print_ISBN
0-7695-0487-6
Type
conf
DOI
10.1109/ICVD.2000.812654
Filename
812654
Link To Document