DocumentCode
3418616
Title
Process flow system for VLSI research and development
Author
Funakoshi, Kiyohiko
Author_Institution
Hitachi Device Dev. Centre, Tokyo, Japan
fYear
1992
fDate
30 Sep-1 Oct 1992
Firstpage
55
Lastpage
59
Abstract
A process flow system consisting of an intelligent process flow design system, a lot scheduling system and a lot tracking system is discussed. The system has been implemented in a VLSI research and development facility. It is shown that the system substantially increases the design efficiency of various complex process flows and the fabrication efficiency of a wide variety of VLSIs under those process flows
Keywords
VLSI; integrated circuit manufacture; production control; research and development management; VLSI research and development; design efficiency; fabrication efficiency; intelligent process flow design; lot scheduling system; lot tracking system; process flow system; CMOS technology; Design engineering; Fabrication; Job shop scheduling; Manufacturing processes; Process design; Production; Random access memory; Research and development; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference and Workshop, 1992. ASMC 92 Proceedings. IEEE/SEMI 1992
Conference_Location
Cambridge, MA
Print_ISBN
0-7803-0740-2
Type
conf
DOI
10.1109/ASMC.1992.253836
Filename
253836
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