• DocumentCode
    3419283
  • Title

    An energy-efficient adaptive multiple-issue architecture

  • Author

    Lan, Mars ; Biglari-Abhari, Morteza

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Auckland Univ., New Zealand
  • fYear
    2004
  • fDate
    31 Aug.-3 Sept. 2004
  • Firstpage
    350
  • Lastpage
    357
  • Abstract
    Energy-efficient and low-power designs issues are becoming more important in modern processors. In this paper we propose an energy-efficient adaptive multiple-issue architecture for portable systems. The architecture utilizes a hardware-software cooperation approach to minimize hardware overhead while providing control flexibilities to programs and operating systems. Optimizations are made based on the program execution profile. Simulation results show that the adaptive architecture improves the performance by an average 20% with a maximum 8% reduction in energy consumption compared with the baseline model. The increase in power dissipation is restricted to less than 6%.
  • Keywords
    circuit optimisation; hardware-software codesign; logic design; low-power electronics; microprocessor chips; adaptive architecture; adaptive multiple-issue architecture; energy consumption; energy-efficient architecture; hardware-software cooperation; low-power design; modern processors; operating systems; power dissipation; program execution profile; Computer architecture; Control systems; Dynamic voltage scaling; Energy consumption; Energy efficiency; Hardware; Mars; Pipelines; Power dissipation; Power system modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital System Design, 2004. DSD 2004. Euromicro Symposium on
  • Print_ISBN
    0-7695-2203-3
  • Type

    conf

  • DOI
    10.1109/DSD.2004.1333296
  • Filename
    1333296