DocumentCode
3419398
Title
Coplanar bus model validation using test board and high speed CMOS driver
Author
Otsuka, Kanji ; Ichise, Akinari
Author_Institution
Coll. of Inf., Meisei Univ., Tokyo, Japan
fYear
1997
fDate
5-7 Feb 1997
Firstpage
59
Lastpage
68
Abstract
Test vehicles consisting of a special arrangement of test boards each mounted with high speed CMOS drivers were prepared for validation of a high speed coplanar bus model. Actual wave delay and deformation through several lines were measured and compared with those in a coplanar line, a stand alone line and a microstrip line. The coplanar bus line was superior to even a microstrip line with a ground and power plane at frequencies on the order of several hundred MHz. It was concluded that the most important feature for circuits operating in the range of hundreds of MHz frequency is the closed loop current
Keywords
CMOS integrated circuits; closed loop systems; driver circuits; electromagnetic interference; integrated circuit testing; microstrip lines; EMI; closed loop current; coplanar bus line; coplanar bus model validation; coplanar line; ground plane; high speed CMOS driver; high speed coplanar bus model; microstrip line; power plane; stand alone line; test board; test vehicles; wave deformation; wave delay; Coaxial cables; Driver circuits; Electromagnetic interference; Electromagnetic scattering; Electronic equipment testing; Frequency; Integrated circuit interconnections; Printed circuits; Semiconductor device modeling; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Performance, Computing, and Communications Conference, 1997. IPCCC 1997., IEEE International
Conference_Location
Phoenix, Tempe, AZ
Print_ISBN
0-7803-3873-1
Type
conf
DOI
10.1109/PCCC.1997.581379
Filename
581379
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