DocumentCode :
3419450
Title :
The logarithmic checking method for on-line testing of computing circuits for processing of the approximated data
Author :
Drozd, A. ; Al-Azzeh, R. ; Drozd, J. ; Lobachev, M.
Author_Institution :
Dept. of Comput., Odessa Nat. Polytech. Univ., Ukraine
fYear :
2004
fDate :
31 Aug.-3 Sept. 2004
Firstpage :
416
Lastpage :
423
Abstract :
In this paper we present logarithmic checking method for on-line testing of the fixed-point adder, multiplier and divider for processing of the approximated data. The check code as logarithmic estimation of fixed-point number is defined. Check equations, connected check codes of operands and result for operation of addition multiplication and division are proved. The method distinguishes errors, which are essential and non-essential for reliability of calculated results. It allows to lower rejection of authentic results and to raise results check reliability in processing of the approximated data in comparison with the residue checking.
Keywords :
adders; dividing circuits; fixed point arithmetic; logic testing; multiplying circuits; check code; check equations; computing circuits; divider; fixed-point adder; fixed-point number; logarithmic checking method; multiplier; online testing; residue checking; Accuracy; Adders; Arithmetic; Automatic testing; Circuit testing; Digital systems; Equations; Hardware; Probability; Redundancy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design, 2004. DSD 2004. Euromicro Symposium on
Print_ISBN :
0-7695-2203-3
Type :
conf
DOI :
10.1109/DSD.2004.1333305
Filename :
1333305
Link To Document :
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