• DocumentCode
    3419509
  • Title

    Some aspects related with the performability of the sequential multipliers units

  • Author

    Popescu, Daniela E. ; Pater, Mirela

  • Author_Institution
    Dept. of Comput. Sci., Univ. of Oradea, Oradea, Romania
  • fYear
    2009
  • fDate
    July 29 2009-Aug. 1 2009
  • Firstpage
    127
  • Lastpage
    132
  • Abstract
    There are two basic ways in which the basic procedures can be speeded up: speeding up each addition and reducing the number of additions required. Faster addition can be achieved through the use of progressively adder, (carry-skip adder, carry-lookahead adder, carry-select adder). The problem is that once the list of this adders has been exhausted, some other method for speeding up the addition process is needed; one such method is that of using carry save adders, which is analyzed in this paper.
  • Keywords
    adders; digital arithmetic; multiplying circuits; addition process reduction; carry propagate adder; carry save adder; sequential multiplier unit performability; Computer applications; Conferences;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Soft Computing Applications, 2009. SOFA '09. 3rd International Workshop on
  • Conference_Location
    Arad
  • Print_ISBN
    978-1-4244-5054-1
  • Electronic_ISBN
    978-1-4244-5056-5
  • Type

    conf

  • DOI
    10.1109/SOFA.2009.5254864
  • Filename
    5254864