DocumentCode :
3419518
Title :
Techniques for formal verification of digital systems: a system approach
Author :
Shojaei, Hamid ; Ghayoumi, Habib
Author_Institution :
Dept. of Comput., Islamic Azad Univ., Tehran, Iran
fYear :
2004
fDate :
31 Aug.-3 Sept. 2004
Firstpage :
444
Lastpage :
449
Abstract :
In this paper we describe a methodology for the formal verification of a processor using the CTL property language. Processors are important in design and verification of digital systems because they have structures that represent most digital systems. Processors are programmable, have control parts, data parts and are rich in bus structure. Verification of CPU structures requires verification of data components, controllers, datapath and instruction level verification. This work uses a processor to discuss various features of formal verification. Because of generality of processors, we will be able to cover most aspects of property-based verification and properties used for this purpose.
Keywords :
digital systems; formal verification; microprocessor chips; programmable circuits; CPU structures; CTL property language; bus structure; control parts; controllers verification; data components; data parts; datapath verification; digital systems; formal verification; instruction level verification; programmable processors; property-based verification; Arithmetic; Counting circuits; Data processing; Digital systems; Formal verification; Hardware; Logic; Process design; Registers; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design, 2004. DSD 2004. Euromicro Symposium on
Print_ISBN :
0-7695-2203-3
Type :
conf
DOI :
10.1109/DSD.2004.1333309
Filename :
1333309
Link To Document :
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