Analysis of interconnections with BCB for high-speed digital applications

Author

Umeda, Y. ; Osafune, K. ; Enoki, T. ; Yokoyama, H. ; Ishii, Y.

Author_Institution

NTT Syst. Electron. Labs., Kanagawa, Japan

Volume

1

fYear

1999

fDate

13-19 June 1999

Firstpage

205

Abstract

Transmission-line parameter extraction by S-parameter measurement and interconnection-delay calculation using an analytical delay expression with transmission lines shows that the shorter delay in the interconnections on BCB film than those directly on an InP substrate is due to both smaller capacitance and resistance. A fabricated SCFL inverter with the interconnections on BCB film and 0.1 /spl mu/m gate InP-based HEMTs show an ultrashort gate delay of 4.6 ps/gate. The analysis predicts that a further decrease in the interconnection delay is possible by optimizing the gate width of the HEMTs.

Keywords

HEMT integrated circuits; S-parameters; capacitance; delay estimation; dielectric thin films; electric resistance; equivalent circuits; field effect digital integrated circuits; high-speed integrated circuits; integrated circuit interconnections; transmission line theory; 0.1 micron; 4.6 ps; BCB film; HEMT gate width optimisation; IC interconnections; InP; InP-based HEMTs; S-parameter measurement; SCFL inverter; analytical delay expression; benzocycloburene; capacitance; high-speed digital applications; interconnection delay calculation; resistance; transmission-line parameter extraction; Capacitance measurement; Delay; Electrical resistance measurement; HEMTs; Indium phosphide; MODFETs; Parameter extraction; Scattering parameters; Transmission line measurements; Transmission lines;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest, 1999 IEEE MTT-S International

Conference_Location

Anaheim, CA, USA

Print_ISBN

0-7803-5135-5

Type

conf

DOI

10.1109/MWSYM.1999.779458

Filename

779458