DocumentCode
3419546
Title
ESD and latchup considerations for analog and power applications
Author
Voldman, S.H.
Author_Institution
Dr. Steven H. Voldman LLC, South Burlington, VT, USA
fYear
2012
fDate
Oct. 29 2012-Nov. 1 2012
Firstpage
1
Lastpage
4
Abstract
In this Invited Paper, an overview of electrostatic discharge (ESD) and latchup challenges in analog and power applications will be discussed. Analog and power technologies continue to be a challenge for electrostatic discharge (ESD) protection and latchup. Different aspects of ESD and latchup development from technology, application spaces, device design, analog and power circuits, mixed signal issues, models, testing, and computer aided design (CAD) issues will be addressed.
Keywords
analogue circuits; circuit CAD; electrostatic discharge; integrated circuit testing; ESD; analogue circuits; application spaces; computer aided design; device design; electrostatic discharge protection; latchup considerations; latchup development; Design automation; Electrostatic discharges; Hidden Markov models; Libraries; Low voltage; Solid modeling; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location
Xi´an
Print_ISBN
978-1-4673-2474-8
Type
conf
DOI
10.1109/ICSICT.2012.6467805
Filename
6467805
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