DocumentCode
3419725
Title
Impact of extrinsic capacitances on FinFETs RF performance
Author
Tinoco, J.C. ; Alvarado, J. ; Martinez-Lopez, A.G. ; Raskin, J. -P
Author_Institution
Depto. de Ing. en Telecomun., UNAM, Mexico City, Mexico
fYear
2012
fDate
16-18 Jan. 2012
Firstpage
73
Lastpage
76
Abstract
Triple-Gate FinFETs have been demonstrated to be promising to push further the down scaling of the CMOS technology, thanks to their high immunity against the so-called short channel effects. However, due to their three-dimensional (3-D) architecture, strong degradation of their analog characteristics has been reported, basically due to large extrinsic resistances and capacitances. In this paper, based on measurements and 3-D numerical simulations we analyze the impact of the extrinsic gate capacitance on the RF behavior of FinFETs. It observes that the extrinsic capacitances are larger than the intrinsic counterparts for sub-100 nm devices. Furthermore, the reduction of the fin spacing as well as the increase of the fin geometrical aspect ratio (height/width) can improve significantly the FinFETs RF behavior.
Keywords
CMOS integrated circuits; MOSFET; circuit simulation; electric resistance; 3D architecture; 3D numerical simulation; CMOS technology; FinFET RF performance; RF behavior; analog characteristics; down scaling; extrinsic gate capacitance; extrinsic resistances; fin geometrical aspect ratio; fin spacing; short channel effect; triple-gate FinFET; Capacitance; Cutoff frequency; Electrical resistance measurement; FinFETs; Logic gates; Radio frequency; 3-D numerical simulations; FinFETs; RF characterization; cut-off frequency; extrinsic capacitances;
fLanguage
English
Publisher
ieee
Conference_Titel
Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2012 IEEE 12th Topical Meeting on
Conference_Location
Santa Clara, CA
Print_ISBN
978-1-4577-1317-0
Type
conf
DOI
10.1109/SiRF.2012.6160141
Filename
6160141
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