Comparative Analysis of Adiabatic Compressor Circuits for Ultra-low Power DSP Application

In recent years, a plethora of adiabatic logic styles have been published in literature for ultra low power application, but only very few investigate and compare the performances of these adiabatic logic styles. This paper compares and analyzes the performance of transistor based imperative adiabatic logic styles, using 4-2 compressor circuit as a reference. Significant differences in area occupation, energy consumption, operating frequencies are found among the various logic styles. All the simulations are carried out by CADENCE spice spectra in 0.18μm CMOS technology.