Addressing architecture for brain-like massively parallel computers

This paper is concerned with a new type of computer architecture being massively parallel. It describes novel approaches that were developed to solve task execution performance problems inherent in all current parallel computers. It also gives an overview of current addressing methods issues, unique algorithms for storage retrieval and communication between processing nodes scattered in a volume of space, developed for the brain-like machine that comprises of numerous numbers of neuronic like nodes positioned on unique bus tracks connected to each other forming a geographical map containing complex ´network layers´, comprising of multiple communicating nodes forming mini, maxi, intelligent processing layers. The unique bus tracks containing mini and or maxi processing nodes are fully connected to form the next generation network for the brain-like massively parallel distributed or tightly coupled computing systems. A simulation that demonstrates the operation of the novel architecture addressing nodes positioned in a volume of space is given.