• DocumentCode
    3420473
  • Title

    A fully-overlapped multi-mode QC-LDPC decoder architecture for mobile WiMAX applications

  • Author

    Xiang, Bo ; Bao, Dan ; Huang, Shuangqu ; Zeng, Xiaoyang

  • Author_Institution
    State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
  • fYear
    2010
  • fDate
    7-9 July 2010
  • Firstpage
    225
  • Lastpage
    232
  • Abstract
    A fully-overlapped multi-mode QC-LDPC decoder architecture, adopting improved TDMP algorithm, is presented in this paper. With symmetrical four-stage pipelining, block column and row permutations, nonzero sub-matrix reordering, sum memory odd-even partition, and read-write bypass, two phases are fully overlapped and each phase scans nonzero sub-matrices one by one in block row-wise order without access conflicts to sum memories. The sum memories store not only variable node sums but also prior messages. In this case, it saves an additional FIFO of 13 440 bits. The decoder attains 248-287 Mb/s at 150 MHz and 15 iterations.
  • Keywords
    Application specific integrated circuits; Iterative algorithms; Iterative decoding; Parity check codes; Partitioning algorithms; Pipeline processing; Read-write memory; Sparse matrices; Throughput; WiMAX;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application-specific Systems Architectures and Processors (ASAP), 2010 21st IEEE International Conference on
  • Conference_Location
    Rennes, France
  • ISSN
    2160-0511
  • Print_ISBN
    978-1-4244-6966-6
  • Electronic_ISBN
    2160-0511
  • Type

    conf

  • DOI
    10.1109/ASAP.2010.5540958
  • Filename
    5540958