DocumentCode
3420521
Title
A Novel Approach to Find the Best Fit for VLSI Partitioning - Physical Design
Author
Shanavas, I. Hameem ; Gnanamurthy, R.K. ; Thangaraj, T. Stephen
Author_Institution
Vels Srinivasa Coll. of Eng. & Technol., Chennai, India
fYear
2010
fDate
16-17 Oct. 2010
Firstpage
330
Lastpage
332
Abstract
Circuit partitioning plays an important role in physical design automation of very large scale integration (VLSI) chips. The interest in finding an optimal partitioning especially in VLSI has been a hot issue in recent years. In VLSI circuit partitioning, the problem of obtaining a minimum cut is of prime importance. To enhance, other criterion like power, delay and area in addition to minimum cut is included. Memetic Algorithm (MA) is an evolutionary algorithm that includes one or more local search phases within its evolutionary cycle. MA applies some sort of local search for optimization of VLSI partitioning. The algorithm combines a hierarchical design technique, Genetic algorithm and constructive techniques like Simulated Annealing for local search to solve VLSI partitioning problem. MA quickly produces optimal solution for the entire popular benchmark problem. The result will be compared with the previous work result.
Keywords
VLSI; genetic algorithms; integrated circuit design; search problems; simulated annealing; VLSI circuit partitioning; evolutionary algorithm; genetic algorithm; local search phases; memetic algorithm; physical design automation; simulated annealing; very large scale integration chips; Algorithm design and analysis; Computational modeling; Delay; Memetics; Optimization; Partitioning algorithms; Very large scale integration; genetic; memetic algorithm; partition problem;
fLanguage
English
Publisher
ieee
Conference_Titel
Advances in Recent Technologies in Communication and Computing (ARTCom), 2010 International Conference on
Conference_Location
Kottayam
Print_ISBN
978-1-4244-8093-7
Electronic_ISBN
978-0-7695-4201-0
Type
conf
DOI
10.1109/ARTCom.2010.93
Filename
5656802
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