DocumentCode
3420631
Title
High parallel variation Banyan network based permutation network for reconfigurable LDPC decoder
Author
Peng, Xiao ; Chen, Zhixiang ; Zhao, Xiongxin ; Maehara, Fumiaki ; Goto, Satoshi
Author_Institution
Grad. Sch. of Inf., Production & Syst., Waseda Univ., Kitakyushu, Japan
fYear
2010
fDate
7-9 July 2010
Firstpage
233
Lastpage
238
Abstract
Permutation network plays an important role in the reconfigurable QC-LDPC decoder for most modern wireless communication systems with multiple code rates and various code lengths. In this paper, we propose the variation Banyan network (VBN) based permutation network architecture for the reconfigurable QC-LDPC decoders and give the control signal generating algorithm for cyclic shift. Through introducing the bypass network, we put forward the nonblocking scheme for any input number and shift number. In addition, the optimized VBN is proposed for WiMAX and WiFi standard, which can shift at most 4 groups of input data, and greatly reduce the hardware complexity. The synthesis results using the 90nm technology demonstrate that the proposed permutation network can be implemented with the gate count of 18.3k and the frequency of 600 MHz.
Keywords
Costs; Decoding; Delay; Hardware; Intelligent networks; Parity check codes; Signal generators; Switches; Tin; WiMAX; Banyan network; LDPC decoder; Permutation; Reconfigurable;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-specific Systems Architectures and Processors (ASAP), 2010 21st IEEE International Conference on
Conference_Location
Rennes, France
ISSN
2160-0511
Print_ISBN
978-1-4244-6966-6
Electronic_ISBN
2160-0511
Type
conf
DOI
10.1109/ASAP.2010.5540964
Filename
5540964
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