• DocumentCode
    3420772
  • Title

    State machine interpretation of arithmetic codes for joint source and channel coding

  • Author

    Bi, Dongsheng ; Hoffman, Michael W. ; Sayood, Khalid

  • Author_Institution
    Dept. of Electr. Eng., Nebraska Univ., Lincoln, NE, USA
  • fYear
    2006
  • fDate
    28-30 March 2006
  • Firstpage
    143
  • Lastpage
    152
  • Abstract
    Based on the encoding process, arithmetic codes can be viewed as tree codes and current proposals for decoding arithmetic codes with forbidden symbols belong to sequential decoding algorithms and their variants. However, arithmetic coding can also be modeled as a finite state machine and can be treated as a variable-length trellis code. The number of states used for decoding can be reduced and techniques used for convolutional codes such as the list Viterbi decoding algorithm can be applied on the trellis. The proposed approach provides a rich environment for the design of joint source/channel codes. The particular implementation presented here shows significant performance improvement over previous approaches.
  • Keywords
    Viterbi decoding; arithmetic codes; combined source-channel coding; convolutional codes; finite state machines; tree codes; trellis codes; variable length codes; Viterbi decoding algorithm; arithmetic codes; convolutional codes; finite state machine; joint source and channel coding; sequential decoding algorithms; state machine interpretation; tree codes; variable-length trellis code; Arithmetic; Automata; Bismuth; Channel coding; Clocks; Convolutional codes; Delay; Iterative decoding; Modulation coding; Viterbi algorithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Data Compression Conference, 2006. DCC 2006. Proceedings
  • ISSN
    1068-0314
  • Print_ISBN
    0-7695-2545-8
  • Type

    conf

  • DOI
    10.1109/DCC.2006.73
  • Filename
    1607249