Memoryless RNS-to-binary converters for the {2n+1 - 1, 2n, 2n - 1} moduli set

In this paper, we propose two novel memoryless reverse converters for the moduli set {2ⁿ⁺¹ – 1,2ⁿ, 2ⁿ – 1}. The first proposed converter does not entirely cover the dynamic range while the second proposed converter covers the entire dynamic range. First, we simplify the Chinese Remainder Theorem in order to obtain a reverse converter that utilizes mod-(2ⁿ⁺¹ – 1) operation. Second, we further reduce the resulting architecture to obtain a reverse converter that uses only carry save adders and carry propagate adders. FPGA implementation results indicate that, on average, the proposed limited dynamic range converter achieves about 42% area reduction. However, the second proposed converter provides only 29.48% area reduction when compared with the most effective equivalent state of the art converter. Both of the proposed converters also exhibit a small speed improvement over the state of the art equivalent converter.