Title :
High frequency performance of a fully depleted 0.25-/spl mu/m SOI CMOS technology
Author :
Rathman, D.D. ; Burns, J.A. ; Chen, C.L. ; Berger, R. ; Soares, A.M. ; Mathews, R.H.
Author_Institution :
Lincoln Lab., MIT, Lexington, MA, USA
Abstract :
A fully depleted (FD) 0.25-/spl mu/m silicon-on-insulator (SOI) CMOS process technology has been developed and established at Lincoln Laboratory. Here we describe the FDSOI process technology, report the high frequency performance of 0.25-/spl mu/m n- and p-channel MOSFETs and digital and analog circuits, and predict the performance of the FDSOI technology scaled to 0.1-/spl mu/m gate lengths.
Keywords :
CMOS integrated circuits; UHF integrated circuits; integrated circuit technology; mixed analogue-digital integrated circuits; silicon-on-insulator; 0.1 to 0.25 micron; FDSOI process technology; HF performance; RF ICs; Si; analog circuits; digital circuits; fully depleted SOI CMOS technology; high frequency performance; mixed analog-digital ICs; n-channel MOSFETs; p-channel MOSFETs; scaling; CMOS technology; Delay; Frequency; Laboratories; MOSFETs; Oxidation; Plasma applications; Plasma materials processing; Power supplies; Silicon on insulator technology;
Conference_Titel :
Microwave Symposium Digest, 1999 IEEE MTT-S International
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
0-7803-5135-5
DOI :
10.1109/MWSYM.1999.779828
