Potential of using block floating point arithmetic in ASIP-based GNSS-receivers

As an alternative to floating point and fixed point arithmetics, block floating point arithmetic offers a compromise between computational accuracy and hardware complexity. Nevertheless, today practical applications are limited to Fast Fourier Transformation and digital filters. This work uses the block floating point format to realize the position estimation algorithm in Global Navigation Satellite System (GNSS) receivers, which is based on the Newton-Rhapson method. The precision of this novel approach is quantified by extensive simulations using synthetic as well as real GNSS data. The implementation of the position estimation algorithm using block floating point format on an application specific processor is introduced and compared to implementations on a standard embedded processor and in standard floating point arithmetic in terms of performance and costs.