A dynamic power programmable 10-bit 20-MS/s pipeline ADC for ISM band wireless communication

Author

Tao Sun ; Ning Wang ; Qi Zhang ; Dunshan Yuan ; Hui Wang

Author_Institution

Sch. of Microelectron., Shanghai Jiao Tong Univ., Shanghai, China

fYear

2012

fDate

Oct. 29 2012-Nov. 1 2012

Firstpage

1

Lastpage

3

Abstract

This paper presents a 10-bit 20MS/s pipeline analog-to-digital converter implemented in 0.18 μ m CMOS technology with dynamic programmable power consumption. The proposed pipeline ADC achieves a typical performance of 58.47dB SNDR and 61.48dB SFDR with a minimum power dissipation of 5mW. Circuit techniques such as dynamic comparators, stage capacitor scaling and a novel dynamic programmable power switcher have been used to achieve this level of power consumption.

Keywords

CMOS integrated circuits; analogue-digital conversion; comparators (circuits); power consumption; radio networks; switches; CMOS technology; ISM band wireless communication; SNDR; circuit technique; dynamic comparators; dynamic power programmable pipeline ADC; dynamic programmable power consumption; dynamic programmable power switcher; gain 58.47 dB; gain 61.48 dB; pipeline analog-to-digital converter; power 5 mW; power dissipation; size 0.18 mum; stage capacitor scaling; word length 10 bit; Analog-digital conversion; Capacitors; Pipelines; Power demand; Power dissipation; Signal to noise ratio; Wireless communication;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4673-2474-8

Type

conf

DOI

10.1109/ICSICT.2012.6467886

Filename

6467886