LH-Bist for digital correction of ADC offset

Author

Bernard, S. ; Azais, F. ; Comte, M. ; Bertrand, Y. ; Renovell, M.

Author_Institution

LIRMM, Univ. of Montpellier, Montpellier

fYear

2009

fDate

6-9 April 2009

Firstpage

199

Lastpage

203

Abstract

In this paper, we show that it is possible to use built-in-self-test circuitry to correct some errors of the ADC under test. We take the example of the LH-BIST architecture we have previously developed to measure the ADC offset value. The interest of LH-BIST architecture is that one of its registers is directly connected to the output of the convert. Hence, this register can be use to digitally modify the running code of ADC according to offset value extract by this very LH-BIST circuitry.

Keywords

analogue-digital conversion; built-in self test; error correction; integrated circuit testing; ADC offset digital correction; ADC offset value measurement; LH-BIST architecture; analogue-digital convertor error correction; built-in-self-test circuitry; Built-in self-test; Capacitors; Circuit testing; Error correction; Registers; Signal generators; Signal processing; Switches; Threshold voltage; Tin; ADC testing; BIST; Histogram-based test; digital correction;

fLanguage

English

Publisher

ieee

Conference_Titel

Design & Technology of Integrated Systems in Nanoscal Era, 2009. DTIS '09. 4th International Conference on

Conference_Location

Cairo

Print_ISBN

978-1-4244-4320-8

Electronic_ISBN

978-1-4244-4321-5

Type

conf

DOI

10.1109/DTIS.2009.4938055

Filename

4938055

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3421456