Title :
Novel design for binary to RNS converters
Author :
Mohan, P. V Ananda
Author_Institution :
Indian Telephone Ind. Ltd., Bangalore, India
fDate :
30 May-2 Jun 1994
Abstract :
The choice of moduli for efficient design of binary-to-RNS converters based on recently proposed algorithms is considered
Keywords :
Computer architecture; Concurrent computing; Dynamic range; Hardware; Registers; Tree data structures;
Conference_Titel :
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location :
London
Print_ISBN :
0-7803-1915-X
DOI :
10.1109/ISCAS.1994.408978