Probabilistic metric of gate logical fault occurrence due to manufacturing inaccuracy of threshold logic gates for efficient testing

This paper proposes a precise metric of the occurrence of gate logical faults due to manufacturing inaccuracy of the weight and threshold values in threshold logic gates for effective and efficient testing. Based on probability density functions of the values of the manufactured weights and threshold, the probability of gate logical fault occurrence is calculated and used as the metric. The metric indicates the importance of the corresponding gate input pattern in testing of the threshold logic gate, and will be utilized for effective and efficient testing. We compare our proposed metric with a simple metric.