A reconfigurable quadrature passive downconverter for multimode multistandard receivers in CMOS 0.18 μm

A reconfigurable quadrature downconverter based on current-commutating passive architecture is designed for multimode multistandard applications. The re-configurability is realized by programming the gain of the downconverter by using a 2-bit control word. Other characteristics such as power consumption, noises figure (NF), and linearity is also reconfigurable according to the selected communication standard. The design concept is verified by implementing a quadrature passive downconverter in 0.18 μm CMOS technology. Post-simulation results show that, with the radio frequency (RF) ranges from 700 MHz to 2.3 GHz, the downconverter achieves a minimum voltage conversion gain of 8 dB with 4 gain steps and a step size of 6 dB. The IIP3 is 11 dBm at the lowest gain mode. And the NF is 7.0 dB at 1 MHz output frequency at the highest gain mode. The consumed dc current for one (I or Q) branch ranges from 3.1 to 5.6 mA from a 1.8 V voltage supply at different gain mode. The chip occupies an area of 0.705 mm² including pads.